1. Field of the Invention
The present invention relates to a memory device with a nonvolatile memory, and more particularly to a memory card with a flash memory.
2. Description of the Related Art
A secure digital (SD™) memory card is known as a memory device using a NAND flash memory. This memory card exchanges data communications with a host system such as a digital camera via, for example, a command line and data line.
NAND flash memories comprise a plurality of blocks. Each block is a minimum erasable unit and consists of a plurality of pages as minimum write units. Further, each page comprises, for example, a data section of 512 bytes and a redundancy section of 16 bytes. Although the redundancy section can be used for various purposes, it is recommended to write an ECC code to the section to avoid data corruption, which can occur in NAND flash memories.
In NAND flash memories, the use of even smaller memory cells and multi-value memory cells is increasing the probability of errors. Because of this, there is a case where a high-capacity ECC circuit is needed, and an ECC code of 10 bytes is written to the redundancy section. In this case, the remaining 6 bytes of the redundancy section is freely usable, and can be used for a logical block address, flag, etc.
In the prior art, the ECC code is created from data in the data section and redundancy section. Therefore, unless all page data is read and computation is performed based on it, error detection and correction cannot be performed. This applies, even if, for example, only a logical block address stored in the redundancy section is necessary.
To acquire 6-byte data from the redundancy section, data of 528 (512+16) bytes must be read. This means that the time required for data reading is 88 (528/6) times that required for reading 6-byte data from the redundancy section.
This being so, the time necessary to read/write data after the memory card is activated increases as the capacity (number of blocks) of the memory card increases.
Concerning a technique related to the above, see, for example, Jpn. Pat. Appln. KOKAI Publication No. 2003-280822, which discloses reducing the time necessary to read/write data from/to a nonvolatile memory.